The present invention is related to integrated circuit structure and processing technology and, more particularly, to antifuses in integrated circuits and their manufacture.
Antifuses are found in a growing number of integrated circuits, most of which are field programmable gate arrays (FPGA's). As the name implies, antifuses have a very high resistance (to form essentially an open circuit) in the unprogrammed ("off") state, and a very low resistance (to form essentially a closed circuit) in the programmed ("on") state. In these integrated circuits antifuses are placed at the intersections of interconnection lines which lead to different elements of the integrated circuit. By programming selected antifuses, the interconnections between the various elements of the integrated circuit are formed to define the function of the device.
In a typical antifuse structure a programming layer of antifuse material, such as amorphous silicon, is sandwiched between two metal interconnection lines. Depending upon the material of each metal interconnection layer, a layer of barrier metal, such as TiW (titanium-tungsten), is placed between the programming layer and each metal interconnection layer. Barrier metal layers function to block the undesired interdiffusion of material from a programming layer, such as amorphous silicon, and material from a metal layer, such as aluminum alloy. Barrier metal layers are typically refractory metals, their intermetallics, alloys, silicides, nitrides and combinations thereof.
However, various problems have been found with present antifuses. One problem is that the programmed resistance (R.sub.ON) typically varies between 30 to 150 ohms, depending on the programming current (I.sub.pp). While these values are low enough for FPGA's to operate quite adequately, even lower resistance values would significantly improve performance. Thus a goal of any antifuse is to lower R.sub.ON as much as possible.
A second problem with present antifuses is that R.sub.ON is sometimes unstable. With use, the programmed resistance of the antifuse sometimes drifts and increases to very high values which result in a device failure. For the programmed FPGA, the failure of one antifuse is disastrous since the programmed circuit is no longer realized in the integrated circuit.
The present invention solves or substantially mitigates these problems. A further advantage is that the present invention can be incorporated into existing antifuse processes without radical and expensive changes.